Microchip ATxmega64A3U Manual

Microchip Ikke kategoriseret ATxmega64A3U

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AVR® Instruction Set Manual

Introduction

This manual gives an overview and explanation of every instruction available for 8-bit AVR

® devices. Each instruction

has its own section containing functional description, it’s opcode, and syntax, the end state of the status register, and

cycle times.

The manual also contains an explanation of the different addressing modes used by AVR devices and an appendix

listing all modern AVR devices and what instruction it has available.

Table of Contents

Introduction.....................................................................................................................................................1

1. Instruction Set Nomenclature..................................................................................................................6

2. CPU Registers Located in the I/O Space................................................................................................8

2.1. RAMPX, RAMPY, and RAMPZ.....................................................................................................8

2.2. RAMPD........................................................................................................................................ 8

2.3. EIND.............................................................................................................................................8

3. The Program and Data Addressing Modes.............................................................................................9

3.1. Register Direct, Single Register Rd..............................................................................................9

3.2. Register Direct - Two Registers, Rd and Rr................................................................................. 9

3.3. I/O Direct.................................................................................................................................... 10

3.4. Data Direct................................................................................................................................. 10

3.5. Data Indirect............................................................................................................................... 11

3.6. Data Indirect with Pre-decrement............................................................................................... 11

3.7. Data Indirect with Post-increment.............................................................................................. 12

3.8. Data Indirect with Displacement.................................................................................................12

3.9. Program Memory Constant Addressing using the LPM, ELPM, and SPM Instructions............. 13

3.10. Program Memory with Post-increment using the LPM Z+ and ELPM Z+ Instruction................. 13

3.11. Store Program Memory Post-increment.....................................................................................14

3.12. Direct Program Addressing, JMP and CALL.............................................................................. 14

3.13. Indirect Program Addressing, IJMP and ICALL..........................................................................15

3.14. Extended Indirect Program Addressing, EIJMP and EICALL.....................................................15

3.15. Relative Program Addressing, RJMP and RCALL..................................................................... 16

4. Conditional Branch Summary............................................................................................................... 17

5. Instruction Set Summary.......................................................................................................................18

6. Instruction Description...........................................................................................................................24

6.1. ADC – Add with Carry................................................................................................................ 24

6.2. ADD – Add without Carry........................................................................................................... 25

6.3. ADIW – Add Immediate to Word................................................................................................ 26

6.4. AND – Logical AND....................................................................................................................27

6.5. ANDI – Logical AND with Immediate..........................................................................................28

6.6. ASR – Arithmetic Shift Right...................................................................................................... 29

6.7. BCLR – Bit Clear in SREG......................................................................................................... 30

6.8. BLD – Bit Load from the T Bit in SREG to a Bit in Register....................................................... 31

6.9. BRBC – Branch if Bit in SREG is Cleared..................................................................................32

6.10. BRBS – Branch if Bit in SREG is Set......................................................................................... 33

6.11. BRCC – Branch if Carry Cleared................................................................................................34

6.12. BRCS – Branch if Carry Set....................................................................................................... 35

6.13. BREAK – Break..........................................................................................................................36

6.14. BREQ – Branch if Equal.............................................................................................................36

6.15. BRGE – Branch if Greater or Equal (Signed).............................................................................37

6.16. BRHC – Branch if Half Carry Flag is Cleared.............................................................................38

AVR® Instruction Set Manual

Produkt Specifikationer

Mærke:	Microchip
Kategori:	Ikke kategoriseret
Model:	ATxmega64A3U

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