Microchip MCP6S91 Manual

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 2004 Microchip Technology Inc. DS21908A-page 1

MCP6S91/2/3

Features

• Multiplexed Inputs: 1 or 2 channels

• 8 Gain Selections:

- +1, +2, +4, +5, +8, +10, +16 or +32 V/V

• Serial Peripheral Interface (SPI™)

• Rail-to-Rail Input and Output

• Low Gain Error: ±1% (max.)

• Offset Mismatch Between Channels: 0 µV

• High Bandwidth: 1 to 18 MHz (typ.)

• Low Noise: 10 nV/√Hz @ 10 kHz (typ.)

• Low Supply Current: 1.0 mA (typ.)

• Single Supply: 2.5V to 5.5V

• Extended Temperature Range: -40°C to +125°C

Typical Applications

• A/D Converter Driver

• Multiplexed Analog Applications

• Data Acquisition

• Industrial Instrumentation

• Test Equipment

• Medical Instrumentation

Block Diagram

Description

The Microchip Technology Inc. MCP6S91/2/3 are

analog Programmable Gain Amplifiers (PGAs). They

can be configured for gains from +1 V/V to +32 V/V and

the input multiplexer can select one of up to two chan-

nels through a SPI port. The serial interface can also

put the PGA into shutdown to conserve power. These

PGAs are optimized for high-speed, low offset voltage

and single-supply operation with rail-to-rail input and

output capability. These specifications support single-

supply applications needing flexible performance or

multiple inputs.

The one-channel MCP6S91 and the two-channel

MCP6S92 are available in 8-pin PDIP, SOIC and MSOP

packages. The two-channel MCP6S93 is available in a

10-pin MSOP package. All parts are fully specified from

-40°C to +125°C.

Package Types

VOUT

VREF

VDD

SCK

CH1

CH0

VSS

MUX

SPI™

Logic

Gain

Switches

Resistor Ladder (RLAD)

VREF

CH0

VSS

SCK

VDD

VOUT

MCP6S91

PDIP, SOIC, MSOP

CH1

CH0

VSS

SCK

VDD

VOUT

MCP6S92

PDIP, SOIC, MSOP

CH0

VOUT

CH1

7 SI

SCK

5 6

VREF

VDD

VSS

MCP6S93

MSOP

Single-Ended, Rail-to-Rail I/O, Low-Gain PGA

 2004 Microchip Technology Inc. DS21908A-page 2

MCP6S91/2/3

1.0 ELECTRICAL

CHARACTERISTICS

Absolute Maximum Ratings †

VDD – VSS ........................................................................7.0V

All inputs and outputs..................... VSS – 0.3V to VDD + 0.3V

Difference Input voltage ....................................... |V

DD – V SS|

Output Short Circuit Current ..................................continuous

Current at Input Pin .............................................................±2 mA

Current at Output and Supply Pins ................................ ±30 mA

Storage temperature .....................................-65°C to +150°C

Junction temperature .................................................. +150°C

ESD protection on all pins (HBM; MM) ................ ≥4 kV; 200V

† Notice: Stresses above those listed under “Maximum

Ratings” may cause permanent damage to the device. This is

a stress rating only and functional operation of the device at

those or any other conditions above those indicated in the

operational listings of this specification is not implied.

Exposure to maximum rating conditions for extended periods

may affect device reliability.

PIN FUNCTION TABLE

Name Function

VOUT Analog Output

CH0, CH1 Analog Inputs

VREF External Reference Pin

VSS Negative Power Supply

CS SPI Chip Select

SI SPI Serial Data Input

SO SPI Serial Data Output

SCK SPI Clock Input

VDD Positive Power Supply

DC CHARACTERISTICS

Electrical Specifications: Unless otherwise indicated, TA= +25°C, VDD = +2.5V to +5.5V, V SS = GND, VREF = VSS, G = +1 V/V,

Input = CH0 = (0.3V)/G, CH1 = 0.3V, RL= 10 kΩ to VDD/2, SI and SCK are tied low and CS is tied high.

Parameters Sym Min Typ Max Units Conditions

Amplifier Inputs (CH0, CH1)

Input Offset Voltage V OS -4 — +4 mV G = +1

Input Offset Voltage Mismatch ∆VOS — 0 — µV Between inputs (CH0, CH1)

Input Offset Voltage Drift ∆VOS / T∆A— ±1.8 — µV/°C TA = -40°C to +125°C

Power Supply Rejection Ratio PSRR 70 90 — dB G = +1 (Note 1)

Input Bias Current IB— ±1 — pA CHx = VDD/2

Input Bias Current at

Temperature

IB— 30 — pA CHx = VDD/2, TA = +85°C

IB— 600 — pA CHx = V DD/2, TA = +125°C

Input Impedance ZIN — 1013||7 — Ω||pF

Input Voltage Range VIVR VSS − 0.3 — VDD + 0.3 V (Note 2)

Reference Input (VREF)

Input Impedance ZIN_REF — (5/G)||6 — kΩ||pF

Voltage Range VIVR_REF VSS — VDD V (Note 2)

Amplifier Gain

Nominal Gains G — 1 to 32 — V/V +1, +2, +4, +5, +8, +10, +16 or +32

DC Gain Error G = +1 gE-0.2 — +0.2 % VOUT ≈ 0.3V to VDD −0.3V

G ≥ +2 gE-1.0 — +1.0 % VOUT ≈ 0.3V to VDD −0.3V

DC Gain Drift G = +1 ∆ ∆G/ TA— ±0.0002 — %/°C TA = -40°C to +125°C

G G/≥ +2 ∆ ∆TA— ±0.0004 — %/°C TA = -40°C to +125°C

Note 1: RLAD (RF+RG in Figure 4-1) connects VREF, VOUT and the inverting input of the internal amplifier. The MCP6S92 has

VREF tied internally to V SS

, so VSS is coupled to the internal amplifier and the PSRR spec describes PSRR+ only. It is

recommended that the MCP6S92’s V SS

pin be tied directly to ground to avoid noise problems.

2: The MCP6S92’s VIVR and VIVR_REF are not tested in production; they are set by design and characterization.

3: IQ includes current in RLAD (typically 60 µA at VOUT = 0.3V). Both IQ and IQ_SHDN exclude digital switching currents.

Produkt Specifikationer

Mærke:	Microchip
Kategori:	Ikke kategoriseret
Model:	MCP6S91

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