Microchip SY89847U Manual

Microchip Ikke kategoriseret SY89847U

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2018 Microchip Technology Inc. DS20006101A-page 1
SY89847U
Features
• Selects Between Two Sources and Provides 5
Precision LVDS Copies
• Fail Safe Input Prevents Outputs from Oscillating
when Input is Invalid
• Guaranteed AC Performance over Temperature
and Supply Voltage:
- DC-to >1.5 GHz Throughput
- <1000 ps Propagation Delay (IN-to-Q)
- <210 ps Rise/Fall Times
• Ultra-Low Jitter Design:
- <1 psRMS Random Jitter
- <1 psRMS Cycle-to-Cycle Jitter
- <10 psPP Total Jitter (Clock)
- <0.7 psRMS MUX Crosstalk Induced Jitter
• Unique, Patented MUX Input Isolation Design
Minimizes Adjacent Channel Crosstalk
• Unique, Patented Internal Termination and VT Pin
Accepts DC- and AC-Coupled Inputs (CML,
PECL, LVDS)
• Wide Input Voltage Range VCC to GND
• 2.5V ±5% Supply Voltage
• –40°C to +85°C Industrial Temperature Range
• Available in 32-Pin (5 mm x 5 mm) QFN Package
Applications
• Fail Safe Clock Protection
• Ultra-Low Jitter LVDS Clock Distribution
• Rack-Based Telecom/Datacom
Markets
• LAN/WAN
• Enterprise Servers
• ATE
• Test and Measurement
General Description
The SY89847U is a 2.5V, 1:5 LVDS fanout buffer with a
2:1 differential input multiplexer (MUX). A unique fail
safe input (FSI) protection prevents metastable output
conditions when the selected input clock fails to a DC
voltage (voltage between the pins of the differential
input drops significantly below 100 mV).
The differential input includes Microchip’s unique, 3-pin
internal termination architecture that can interface to
any differential signal (AC- or DC-coupled) as small as
100 mV (200 mVPP) without any level shifting or
termination resistor networks in the signal path. The
outputs are LVDS compatible with very fast rise/fall
times guaranteed to be less than 210 ps.
The SY89847U operates from a 2.5V ±5% supply and
is guaranteed over the full industrial temperature range
of –40°C to +85°C. The SY89847U is part of
Microchip’s high-speed, Precision Edge® product line.
Package Type
SY89847U
5 mm x 5 mm QFN-32 (M)
(Top View)
VT0
IN0
/IN0
OE
SEL
IN1
/IN1
VT1
VCC
VCC
GND
GND
VREF-AC1
/Q4
Q4
VCC
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16
24
23
22
21
20
19
18
17
32 31 30 29 28 27 26 25
Q1
/Q1
VCC
Q2
/Q2
VCC
Q3
/Q3
VCC
VCC
GND
GND
VREF-AC0
Q0
/Q0
VCC
1.5 GHz Precision LVDS 1:5 Fanout with 2:1 MUX
and Fail Safe Input with Internal Termination
SY89847U
DS20006101A-page 2 2018 Microchip Technology Inc.
Functional Block Diagram
SEL
OE
0
1
Q0
IN0
/IN0
VT0
ȍ
ȍ
IN1
/IN1
VT1
ȍ
ȍ
VREF-AC0
VREF-AC1
Enable
Logic
/Q0
Q1
/Q1
Q2
/Q2
Q3
/Q3
Q4
/Q4

Produkt Specifikationer

Mærke: Microchip
Kategori: Ikke kategoriseret
Model: SY89847U

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