Steren MC14017B Manual

Steren Ikke kategoriseret MC14017B

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Side 1/8

฀ Semiconductor Components Industries, LLC, 2000

March, 2000 – Rev. 3

1Publication Order Number:

MC14017B/D

The MC14017B is a ve–stage Johnson decade counter with

built–in code converter. High speed operation and spike–free outputs

are obtained by use of a Johnson decade counter design. The ten

decoded outputs are normally low, and go high only at their

appropriate decimal time period. The output changes occur on the

positive–going edge of the clock pulse. This part can be used in

frequency division applications as well as decade counter or decimal

decode display applications.

•Fully Static Operation

•DC Clock Input Circuit Allows Slow Rise Times

•Carry Out Output for Cascading

•Divide–by–N Counting

•Supply Voltage Range = 3.0 Vdc to 18 Vdc

•Capable of Driving Two Low–power TTL Loads or One Low–power

Schottky TTL Load Over the Rated Temperature Range

•Pin–for–Pin Replacement for CD4017B

•Triple Diode Protection on All Inputs

MAXIMUM RATINGS (Voltages Referenced to VSS) (Note 2.)

Symbol Parameter Value Unit

VDD DC Supply Voltage Range – 0.5 to +18.0 V

in , Vout Input or Output Voltage Range

(DC or Transient)

– 0.5 to VDD + 0.5 V

in , Iout Input or Output Current

(DC or Transient) per Pin

±10 mA

PDPower Dissipation,

per Package (Note 3.)

500 mW

TAAmbient Temperature Range – 55 to +125 °C

Tstg Storage Temperature Range – 65 to +150 °C

TLLead Temperature

(8–Second Soldering)

260 °C

2. Maximum Ratings are those values beyond which damage to the device

may occur.

3. Temperature Derating:

Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C

This device contains protection circuitry to guard against damage due to high

static voltages or electric elds. However, precautions must be taken to avoid

applications of any voltage higher than maximum rated voltages to this

high–impedance circuit. For proper operation, V

in and Vout

should be constrained

to the range VSS (Vin or Vout) VDD.

Unused inputs must always be tied to an appropriate logic voltage level (e.g.,

either VSS or VDD). Unused outputs must be left open.

http://onsemi.com

A = Assembly Location

WL or L = Wafer Lot

YY or Y = Year

WW or W = Work Week

Device Package Shipping

ORDERING INFORMATION

MC14017BCP PDIP–16 2000/Box

MC14017BD SOIC–16 48/Rail

MC14017BDR2 SOIC–16 2500/Tape & Reel

1. For ordering information on the EIAJ version of the

SOIC packages, please contact your local ON

Semiconductor representative.

MARKING

DIAGRAMS

PDIP–16

P SUFFIX

CASE 648

MC14017BCP

AWLYYWW

SOIC–16

D SUFFIX

CASE 751B

14017B

AWLYWW

SOEIAJ–16

F SUFFIX

CASE 966

MC14017B

AWLYWW

MC14017BF SOEIAJ–16 See Note 1.

MC14017BFEL SOEIAJ–16 See Note 1.

MC14017B

http://onsemi.com

BLOCK DIAGRAMFUNCTIONAL TRUTH TABLE

(Positive Logic)

Clock Decode

Clock Enable Reset Output=n

0 X 0 n

X 1 0 n

X X 1 Q0

0 0 n+1

X 0 n

1 0 n+1

X = Don’t Care. If n < 5 Carry = “1”,

Otherwise = “0”.

CLOCK

ENABLE

RESET

15 Cout

Q0 3

VDD = PIN 16

VSS = PIN 8

LOGIC DIAGRAM

CLOCK

ENABLE CARRY

RESET

Q5 Q1 Q7 Q3 Q9

117621

Q0 Q6 Q2 Q3 Q4

3 5 4 9 10

R R

PIN ASSIGNMENT

125

Cout

CLOCK

RESET

VDD

VSS

R R

Produkt Specifikationer

Mærke:	Steren
Kategori:	Ikke kategoriseret
Model:	MC14017B

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