Texas Instruments CD74HCT597E Manual

Texas Instruments Ikke kategoriseret CD74HCT597E

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Data sheet acquired from Harris Semiconductor

SCHS191C

Features

• Buered Inputs

• Asynchronous Parallel Load

• Fanout (Over Temperature Range)

- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads

- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads

• Wide Operating Temperature Range . . . -55oC to 125oC

• Balanced Propagation Delay and Transition Times

• Signiﬁcant Power Reduction Compared to LSTTL

Logic ICs

• HC Types

- 2V to 6V Operation

- High Noise Immunity: NIL = 30%, NIH = 30% of VCC

at VCC = 5V

• HCT Types

- 4.5V to 5.5V Operation

- Direct LSTTL Input Logic Compatibility,

VIL= 0.8V (Max), VIH = 2V (Min)

- CMOS Input Compatibility, Il≤µ1 A at VOL, VOH

Description

The ’HC597 and CD74HCT597 are high-speed silicon gate

CMOS devices that are pin-compatible with the LSTTL 597

devices. Each device consists of an 8-flip-flop input register

and an 8-bit parallel-in/serial-in, serial-out shift register. Each

load input (PL) shifts parallel stored data asynchronously into

the shift register. A “low” master input (MR) clears the shift

through the shift register when PL is high.

Pinout

CD54HC597

(CERDIP)

CD74HC597

(PDIP, SOIC, SOP)

CD74HCT597

(PDIP, SOIC)

TOP VIEW

Ordering Information

PART NUMBER TEMP. RANGE (oC) PACKAGE

CD54HC597F3A -55 to 125 16 Ld CERDIP

CD74HC597E -55 to 125 16 Ld PDIP

CD74HC597M -55 to 125 16 Ld SOIC

CD74HC597MT -55 to 125 16 Ld SOIC

CD74HC597M96 -55 to 125 16 Ld SOIC

CD74HC597NSR -55 to 125 16 Ld SOP

CD74HCT597E -55 to 125 16 Ld PDIP

CD74HCT597M -55 to 125 16 Ld SOIC

CD74HCT597MT -55 to 125 16 Ld SOIC

CD74HCT597M96 -55 to 125 16 Ld SOIC

NOTE: When ordering, use the entire part number. The sufﬁxes 96

and R denote tape and reel. The sufﬁx T denotes a small-quantity

reel of 250.

GND

VCC

STCP

SHCP

January 1998 - Revised October 2003

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.

CD54HC597, CD74HC597,

CD74HCT597

High-Speed CMOS Logic

8-Bit Shift Register with Input Storage

[ /Title

(CD74

HC597

CD74

HCT59

/Sub-

ject

(High

Speed

CMOS

Functional Diagram

STCP

SHCP

8 F/F

STORAGE

REG.

8-BIT

SHIFT

REG.

PARALLEL

DATA

INPUTS

FUNCTION TABLE

STCP SHCP PL MR FUNCTION

↑X X X Data Loaded to Input Flip-Flops

↑X L H Data Loaded from Inputs to Shift Register

No Clock Edge X L H Data Transferred from Input Flip-Flops to Shift Register

X X L L Invalid Logic, State of Shift Register Indeterminate when

Signals Removed

X X H L Shift Register Cleared

X H H Shift Register Clocked Qn = Qn-1, Q0 = D↑S

H = High Voltage Level, L = Low Voltage Level, X = Don’t Care, = Transition from Low to High CP Level↑

CD54HC597, CD74HC597, CD74HCT597

Produkt Specifikationer

Mærke:	Texas Instruments
Kategori:	Ikke kategoriseret
Model:	CD74HCT597E
Type:	Logisk kredsløb
Bredde:	19.69 mm
Dybde:	6.6 mm
Højde:	4.57 mm
Antal pr. pakke:	25 stk
Pakkedybde:	506 mm
Pakkebredde:	13.97 mm
Pakkehøjde:	11.23 mm
Opbevaringstemperatur (T-T):	-65 - 150 °C
Driftstemperatur (T-T):	-55 - 125 °C
Pakketype:	PDIP
Antal stifter:	16
Bredde (med stifter):	19.69 mm
Højde (med stifter):	8.26 mm
Dybde (med stifter):	10.92 mm