Microchip ATA6570 Manual
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ATAB657XA Development Board User's Guide
Introduction
The development board ATAB657XA is a hardware platform to evaluate the new ATA657X CAN device
family and it enables users to rapidly prototype and test new CAN designs with the ATA657X ICs.
The ATA657X device family includes three high-speed controller area network (CAN) transceivers, which
interface a CAN protocol controller and the physical two-wire CAN bus designed for high-speed CAN
applications (up to 5 Mbit/s) in the automotive environment. Two of them also support partial networking.
All offer improved electromagnetic compatibility (EMC) and electrostatic discharge (ESD) performance
and very low-power consumption in Standby and Sleep modes:
• Besides local wake-up via WAKE and remote wake-up pattern in accordance with ISO 11898-5, the
ATA6570 is fully compliant to the ISO 11898-6 supporting CAN partial networking. The ATA6570
additionally supports a CAN-FD device and can be easily configured via the SPI as Non-FD
(meaning classical CAN 2.0), CAN FD silent, CAN FD passive or as CAN FD active device, in order
to fulfill the corresponding application requirements. The VIO pin allows the automatic adjustment
of the I/O levels to the I/O level of the connected microcontroller.
• The ATA6571 has ideal passive behavior to the CAN bus when the supply voltage is off.
Microcontrollers with supply voltages from 3V to 5V can be directly interfaced via the VIO pin. Its
advanced low-power management with local and remote wake-up support makes it possible to
achieve very low current consumption in Standby and Sleep mode, even when the internal VIO and
VCC supplies are switched off. Diagnostic and protection functions, including bus line short-circuit
detection and battery connection detection, are also part of the ATA6571's features.
© 2018 Microchip Technology Inc. User Guide DS50002672B-page 1

• The ATA6572 is a CAN Partial Networking transceiver and is very similar to the ATA6570. The only
difference is that instead of the WAKE pin, it has a dedicated reset pin indicating a watchdog failure or
an undervoltage event.
Various operating modes together with the dedicated fail-safe features make the ATA657X an excellent
choice for all types of high-speed CAN networks, especially in nodes requiring low-power mode with local
wake-up capability or via the CAN bus. With the INH output they have the capability to power down the
complete CAN node.
The ATA657X devices are available in a SOIC14 package as well as in a VDFN14 package, for space-saving
application. The development board ATAB657XA supports only SOIC14 packages. However, an adaptor
board can be plugged in using the adaptor board-header, if a device in a VDFN package is used (the adaptor
board is within the not scope of supply and services of this demo kit/board).
Figure 1. SOIC14 Pinning
SOIC14
1
2
3
4ATA6570
5
6
7
TXD
GND
VCC
RXD
VIO
INH
CANH
CANL
VS
14
13
12
11
10
9
8
1
2
3
4ATA6571
5
6
7
TXD
GND
VCC
RXD
VIO
INH
CANH
CANL
VS
14
13
12
11
10
9
8
1
2
3
4ATA6572
5
6
7
TXD
GND
VCC
RXD
VIO
INH
CANH
CANL
VS
14
13
12
11
10
9
8
WAKE
NCS
MOSI
SCK
MISO MISO
SCK
NRES
MOSI
NCS
NSTBY
NC
WAKE
NERR
EN
SOIC14 SOIC14
Development Board Features
The development board for the ATA657X ICs supports the following features:
• All components necessary to put the ATA6570, ATA6571 or ATA6572 into operation are included
• Placeholders for some optional components for extended functions
• All pins are easily accessible
• Switching into Normal, Standby or Sleep mode via two jumpers (ATA6571)
• Push button included for creating a local wake-up after entering Sleep mode
• LEDs for operation indication
• Ground coulter clip for easy probe connection while measuring with oscilloscope
• Connectors for direct plug-in with the C21-XPRO Xplained board (only ATA6570 and ATA6572 with
SPI)
WHAT DOES THE ATAB657XA DEVELOPMENT BOARD KIT CONTAIN?
This ATAB657XA Development Board kit includes:
• ATAB657XA Development Board (ADM00870)
• Important Information Sheet
© 2018 Microchip Technology Inc. User Guide DS50002672B-page 2

Table of Contents
Introduction......................................................................................................................1
Development Board Features..........................................................................................2
WHAT DOES THE ATAB657XA DEVELOPMENT BOARD KIT CONTAIN?...................2
1. Hardware Description................................................................................................ 6
1.1. Power Supply............................................................................................................................... 7
1.2. Headers, Connectors and Jumpers .............................................................................................7
1.3. Mechanical Buttons......................................................................................................................8
1.4. LEDs.............................................................................................................................................8
2. Crypto Authentication Device.................................................................................. 10
3. Mode Control........................................................................................................... 11
4. Graphical User Interface (GUI)................................................................................13
4.1. Features..................................................................................................................................... 13
4.2. Maintab.......................................................................................................................................14
4.3. Registers.................................................................................................................................... 17
4.4. SPI..............................................................................................................................................17
4.5. CAN............................................................................................................................................18
5. Test Setups and Measurements ............................................................................. 19
5.1. Various Measurements...............................................................................................................19
5.2. Measurement Hints.................................................................................................................... 21
6. Schematics and Layout........................................................................................... 23
6.1. ATAB657XA Board Schematic................................................................................................... 23
6.2. Board - Top Silk..........................................................................................................................25
6.3. Board - Top Copper and Silk...................................................................................................... 26
6.4. Board - Top Copper.................................................................................................................... 27
6.5. Board - Bottom Copper.............................................................................................................. 28
7. ATAB657XA Board BOM......................................................................................... 29
8. Register Description................................................................................................ 34
8.1. Device Mode Control Register (Address 0x01)..........................................................................35
8.2. Device Mode Status Register (Address 0x03)........................................................................... 36
8.3. CAN Transceiver Control Register (Address 0x20)....................................................................37
8.4. CAN Transceiver Status Register (Address 0x22)..................................................................... 38
8.5. Bus Failure Indication Register (Address 0x33).........................................................................39
8.6. Transceiver Event Status Register 2 (Address 0x35).................................................................40
8.7. Data Rate Configuration Register (Address 0x26).....................................................................41
8.8. CAN ID Register 0 (Address 0x27)............................................................................................ 42
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8.9. CAN ID Register 1 (Address 0x28)............................................................................................ 43
8.10. CAN ID Register 2 (Address 0x29)............................................................................................ 44
8.11. CAN ID Register 3 (Address 0x2A)............................................................................................ 45
8.12. CAN ID Mask Register 0 (Address 0x2B).................................................................................. 46
8.13. CAN ID Mask Register 1 (Address 0x2C).................................................................................. 47
8.14. CAN ID Mask Register 2 (Address 0x2D).................................................................................. 48
8.15. CAN ID Mask Register 3 (Address 0x2E).................................................................................. 49
8.16. CAN Frame Configuration Register (Address 0x2F).................................................................. 50
8.17. Error Frame Counter Threshold Register (Address 0x3A).........................................................51
8.18. Failure Error Counter Register (Address 0x3B)......................................................................... 52
8.19. Glitch Filter Threshold Register (Address 0x67)........................................................................ 53
8.20. CAN Data Mask Registers 0...7 (Address 0x68…0x6F)............................................................ 54
8.21. Bus Failure Event Capture Enable Register (Address 0x32)..................................................... 55
8.22. Pin WAKE Status Register (Address 0x4B)............................................................................... 56
8.23. Global Event Status Register (Address 0x60)............................................................................57
8.24. System Event Status Register (Address 0x61).......................................................................... 58
8.25. Transceiver Event Status Register (Address 0x63)....................................................................59
8.26. WAKE Event Status Register (Address 0x64)............................................................................60
8.27. Bus Failure Event Indication Status Register (Address 0x65)....................................................61
8.28. System Event Capture Enable Register (Address 0x04)........................................................... 62
8.29. Transceiver Event Capture Enable Register (Address 0x23).....................................................63
8.30. Transceiver Event Capture Enable Register 2 (Address 0x34)..................................................64
8.31. WAKE Event Capture Enable Register (Address 0x4C)............................................................ 65
8.32. Device ID Register (Address 0x7E)............................................................................................66
8.33. Register Write Protection Register (Address 0x0A)................................................................... 67
8.34. Watchdog Configuration Register 1 (Address 0x36).................................................................. 68
8.35. Watchdog Control Register 2 (Address 0x37)............................................................................ 70
8.36. Watchdog Status Register (Address 0x38)................................................................................ 72
8.37. Watchdog Trigger Register (Address 0x39)............................................................................... 73
8.38. General purpose memory 0 (Address 0x06).............................................................................. 74
8.39. General purpose memory 1 (Address 0x07).............................................................................. 75
8.40. General purpose memory 2 (Address 0x08).............................................................................. 76
8.41. General purpose memory 3 (Address 0x09).............................................................................. 77
9. Revision History.......................................................................................................78
The Microchip Web Site................................................................................................ 79
Customer Change Notification Service..........................................................................79
Customer Support......................................................................................................... 79
Microchip Devices Code Protection Feature................................................................. 79
Legal Notice...................................................................................................................80
Trademarks................................................................................................................... 80
Quality Management System Certified by DNV.............................................................81
© 2018 Microchip Technology Inc. User Guide DS50002672B-page 4

Worldwide Sales and Service........................................................................................82
© 2018 Microchip Technology Inc. User Guide DS50002672B-page 5

1. Hardware Description
The development board for the ATA657X is shipped with all components necessary to start developing a
CAN node immediately. However, commands, data and status information are transferred to and from the
ATA6570 and ATA6572 via SPI. This is how the ATA6570 and the ATA6572 can be configured and
operated.
Microchip offers an Xplained Pro board (ATSAMC21-XPRO Xplained board), which can be used to
interface with the ATA657X GUI to operate and control the ATA6570 and ATA6572. This Xplained Pro
board must be ordered separately, as the ATAB657XA board comes as a stand-alone board. The
ATA657X GUI can be downloaded directly from Microchip’s web site: http://www.microchip.com/.
Figure 1-1. ATAB657XB Evaluation Board Overview
After correctly connecting an external 12V DC power supply (Power Header VS) to the power connector
of the ATAB657X A board and connecting the Xplained Pro interface board to the PC via the USB cable,
the kit is ready to use. To start working with the kit, execute the .ATA6570/72.exe
The ATA6570/72 IC starts in Standby mode, INH is active (if jumper J4 is set the LED LD1 is ON) and the
window watchdog is switched off at the ATA6570 and switched on at the ATA6572. A quick check to
determine if everything is working properly can be done by executing the following:
CAN Communication Check:
• Click the button in the sectionNormal Mode Operating mode
• Click the button in the sectionNormal Mode CAN transceiver
• Set “TXD Pulsed”
• Choose 250 kHz as “Frequency” and press the button. A 250 kHz signal should be visible onSet
the CANH and CANL pins, when you put oscilloscope probes on those pins.
Sleep/Wake-up Check:
Hardware Description
© 2018 Microchip Technology Inc. User Guide DS50002672B-page 6

• Select or in the Falling edge Rising edge Wake-up settings section
• Click the button in the section. Please keep in mind that at least oneSleep Mode Operating mode
wake-up source should be selected prior putting the ATA657X device into Sleep mode (to avoid
dead lock). Otherwise the go to sleep command will be ignored and the device will switch to
Standby mode.
• The INH will be switched off and if the jumper J4 is set the LED “LD1” will be switched off
• Press the local wake-up button (ATAB657X board) -> the LED LD1 will be switched on (the
ATA657X device switches from Sleep to Standby mode and the INH becomes active)
Watchdog Check:
• Press the button in the sectionSTBY Mode Operating mode
• Select “Window mode”
• The LED LD1 should be flashing – Watchdog resets at INH, because the watchdog is not triggered
• Set 100 ms for the “Trigger period” in the Watchdog section
• Set “Trigger On”
• The LED LD1 should be permanently on – Watchdog is working properly and no resets are
generated at the INH pin
1.1 Power Supply
The ATAB657XA board can be powered by an external power source (4.5V to 28V) through the X1
connector or the 2-pin power header X4.
Additionally, a 5V external power source should be connected to the X5 connector (VCC) and the power
source (2.8V to 5.5V) used to supply the used microcontroller should be connected to the X5 connector
(VIO), when working in stand-alone mode. When the ATAB657XA board is connected to a C21-XPRO
Xplained Pro board, VIO and VCC will be delivered from the Xplained Pro board through the X3 power
header. However if it is necessary to have an external VIO and/or VCC power supply while an Xplained
Pro board is connected to the ATAB657XA board, the trace at BR5 and BR6 should be cut. This cut-
connection can be at any time restored by soldering a 0Ω resistance on the BR5 and/or BR6 footprint.
1.1.1 Measuring the ATA657X Current Consumption
As part of an evaluation of the ATA657X device it can be of interest to measure its current consumption.
Because the device has different power supplies (VBAT, VCC and VIO) it is possible to measure the
current consumption via separate jumpers. By replacing the jumper J6 by an ampere-meter it is possible
to determine the current consumption at VIO and by replacing the jumper J7 it is possible to measure the
current consumption at VCC.
1.2 Headers, Connectors and Jumpers
The following table describes the implementation of the relevant connectors, headers and jumpers on the
ATAB657XA evaluation board.
Table 1-1. Headers, Connectors and Jumpers
Type Name Description
Switch Jumper J1
NSTBY-pin mode control jumper. The NSTBY pin together
with the EN pin controls the operating mode of the device.
Available only on the ATAB6571A board.
Hardware Description
© 2018 Microchip Technology Inc. User Guide DS50002672B-page 7

Type Name Description
Switch Jumper J2
EN-pin mode control jumper. The EN pin together with the
NSTBY pin controls the operating mode of the device.
Available only on the ATAB6571A board.
Jumper J3
VIO to VCC jumper. If the VIO voltage is same as VCC
(5V) this jumper can be set and only one supply can be
applied at header X5. If VIO is different than VCC this
jumper should be removed.
Jumper J4
When replacing the jumper J4 by an amperemeter it is
possible to determine the current consumption at INH, or
connect an external circuitry. When measuring the allover
current consumption of the device this jumper should be
removed in order to disconnect the LD1 LED from the INH
pin.
Jumper J5
When replacing the jumper J5 by an amperemeter it is
possible to determine the current consumption at NERR.
Or connect an external circuitry. Or when measuring the
all-over current consumption of the device this jumper
should be removed in order to disconnect the LD2 LED
from the NERR pin. Available only on the ATAB6571A
board
Jumper J6 When replacing the jumper J6 by an amperemeter it is
possible to determine the current consumption at VIO.
Jumper J7 When replacing the jumper J7 by an amperemeter it is
possible to determine the current consumption at VCC.
Connector X1 Main power supply connector – VBAT
Header X2 Interface header to C21-XPRO Xplained board
Header X3 External supply power header – GND, VIO and VCC
supplied from C21-XPRO Xplained board.
Header X4 Optional main power supply connector – VBAT
Header X5 VCC and VIO power supply header
Header X6 CAN bus connection header
1.3 Mechanical Buttons
There is one mechanical button on the ATAB657XA board. It is only mounted at the ATAB6570A and
ATAB6571A boards and is used to generate a local wake-up. At the ATAB6572A variant this button is not
assembled.
1.4 LEDs
There are two LEDs available on the ATAB657XA board (LD1 and LD2) indicating activity on INH pin and
NERR pin respectively. Via the jumpers J4 and J5, the LEDs can be deactivated if necessary (for
Hardware Description
© 2018 Microchip Technology Inc. User Guide DS50002672B-page 8

example for current measurements, or if an external circuitry should be connected to the INH pin or to
NERR pin).
Hardware Description
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2. Crypto Authentication Device
On the ATAB657XA board two crypto authentication devices are mounted. The ATSHA204 contains
information that identifies the extension with its name and some extra data. When an ATAB657XA board
is connected through an interface Xplained Pro board to a PC, the information is read and sent to the
GUI. The table below shows the data fields stored in the ID chip with example content.
Table 2-1. ID Chip Content
Data Field Name Example Content
Manufacturer ASCII string Atmel’\0’
Product Name ASCII string ATAB657xA’\0’
Product Revision ASCII string 01’\0’
Product Serial Number ASCII string 1774020200000010’\0’
Minimum Voltage [mV] uint16_t 3300
Maximum Voltage [mV] uint16_t 5500
Maximum Current [mA] uint16_t 50
The second crypto authentication device is the Microchip ATECC508A. It integrates ECDH (Elliptic Curve
Diffie-Hellman) security protocol — an ultra-secure method to provide key agreement for encryption/
decryption, along with ECDSA (Elliptic Curve Digital Signature Algorithm) sign-verify authentication.
Similar to all Microchip CryptoAuthentication products, ATECC508A employs ultra-secure hardware-
based cryptographic key storage and cryptographic countermeasures that are more secure than
software-based key storage.
The device is compatible with any microprocessor (MPU) or microcontroller (MCU) including Microchip
and Microchip AVR MCUs or MPUs. As with all CryptoAuthentication devices, the ATECCC508A delivers
extremely low power consumption, requires only a single GPIO over a wide voltage range and has a tiny
form factor making it ideal for a variety of applications that require longer battery life and flexible form
factors.
The ATECC508A can be used together with the ATA657X can transceiver in order to provide secured
CAN communication. For more information about the ATECC508A crypto authentication device and how
it can be configured please visit our web site: http://www.microchip.com/wwwproducts/en/ATECC508A.
Crypto Authentication Device
© 2018 Microchip Technology Inc. User Guide DS50002672B-page 10

3. Mode Control
The ATA657X devices offer various operation modes.
The desired operating mode of the ATA6570 and the ATA6572 devices can be set via the SPI interface.
With the dedicated GUI and the connected Xplained Pro interface board (C21-XPRO) configuring the
ATA6570 and the ATA6572 devices can be easily done (for more information please see section 4.
Graphical User Interface (GUI)).
The ATA6571 can be set into its different operating modes via the switch jumpers J1 and J2, which are
connected with the NSTBY pin respectively the EN pin. The following table shows the switch jumper
setting and the corresponding selected mode.
Table 3-1. Mode Control Jumper Settings
Mode J1 (NSTBY) Position J2 (EN) Position
Sleep Mode In the middle In the middle
Standby Mode Left (VIO) In the middle
Standby Mode Right (GND) In the middle
Standby Mode Right (GND) Up (GND)
Sleep Mode Right (GND) In the middle
Silent Mode Left (VIO) Up (GND)
Normal Left (VIO) Down (VIO)
Figure 3-1. ATAB6571A Evaluation Board Mode Change Jumpers
Normal Mode
A high level on the NSTBY pin and a high level on the EN pin selects Normal mode. In this mode, the
transceiver is able to transmit and receive data via the CANH and CANL bus lines. The output driver
stage is active and drives data from the TXD input to the CAN bus. The differential receiver converts the
Mode Control
© 2018 Microchip Technology Inc. User Guide DS50002672B-page 11

analog data on the bus lines into digital data that is output to pin RXD. The bus biasing is set to VCC/2
and the undervoltage monitoring of VCC is active. Also the INH output is switched on.
The slope of the output signals on the bus lines is controlled and optimized in a way that guarantees the
lowest possible electromagnetic emission (EME).
To switch the device in normal operating mode, set the NSTBY pin to high (jumper J1 set to the left side)
and the EN pin to high (jumper J2 set to lower position).
The STBY and the EN pins each provide a pull-down current to GND, thus ensuring defined levels if the
pins are open.
Silent Mode
A high level on the NSTBY pin and a low level on the EN pin selects Silent mode. This receive-only mode
can be used to test the connection of the bus medium. In Silent mode, the ATA6571 can still receive data
from the bus, but the transmitter is disabled and therefore no data can be sent to the CAN bus. The bus
pins are released to recessive state (VCC/2) and the INH output remains active. All other IC functions,
including the receiver, continue to operate as they do in Normal mode. Silent mode can be used to
prevent a faulty CAN controller from disrupting all network communications.
Standby Mode
A low level on the NSTBY pin selects Standby mode. In this mode, the transceiver is not able to transmit
or correctly receive data via the bus lines. The transmitter and the Normal-mode receiver are switched off
to reduce current consumption and only a low power differential receiver monitors the bus line for a valid
wake-up signal. If a dominant state longer than twake is received, the RXD switches to low to signal a
wake-up request.
In Standby mode, the bus lines are biased to ground to reduce current consumption to a minimum. The
low-power differential receiver monitors the bus lines for a valid wake-up signal. When the RXD pin
switches to low to signal a wake-up request, a transition to Normal mode is not triggered until the STBY
pin is forced back to low by the microcontroller.
In the event the NSIL input pin is set to low in Standby mode, the internal pull-up resistor causes an
additional quiescent current from VIO to GND. Microchip therefore recommends setting the NSIL to high
in Standby mode.
Sleep Mode
In Sleep Mode the current into the VS pin is reduced to a minimum. The behavior of the transceiver is the
same as in Standby mode, but the INH output is switched off.
Mode Control
© 2018 Microchip Technology Inc. User Guide DS50002672B-page 12

4. Graphical User Interface (GUI)
Figure 4-1. ATA6570/72 Graphical User Interface
Note: The root directory of the GUI contains installers for the Visual C# runtime from Microsoft and for
the Microchip USB drivers. Both are necessary to run the GUI and must be run before the GUI is
launched. should be installed for x86/x64 based systems. For the USB driver thevc_redist.x86.exe
correct installer should be chosen depending on the host computer.
4.1 Features
• Configuration of functions
– Operating mode
– CAN Transceiver mode
Graphical User Interface (GUI)
© 2018 Microchip Technology Inc. User Guide DS50002672B-page 13

– Watchdog
– System events
– Wake-up settings
– CAN-PN settings
– General-purpose memory
– Status bits
– Lock Control
• Direct read/write to all registers
• Configuration for Xplained Pro
– Watchdog trigger
– CAN TXD pin static/pulsed/data
• SPI commands
The ATA657X GUI is a PC software application that graphically displays configuration of an ATA657X
device received through the PC’s USB connection. The received data is shown in different tabs.
4.2 Maintab
This tab gives access to most of the functionality from a feature perspective. The device can be
configured without accessing the registers directly. Register accesses (read and write) will happen in the
background and will be printed to the SPI log window.
This tab is not refreshed periodically. Instead, relevant parts are refreshed when performing an action. For
example, when configuring the operating mode, the mode is read back and updated accordingly. There
are two ways to refresh the complete tab:
• Switch from a different tab
• Select a different SAMC21 Xplained Pro board in the section and press Serial Selection Refresh
Both methods will refresh the entire .Maintab
4.2.1 Serial Selection
The GUI supports connecting to multiple SAMC21 Xplained Pro boards, hence it is necessary to select
which one to send the command to. In the drop-down menu, all boards with a suitable firmware are
shown. Commands are sent to the currently selected one. The board can be identified by the Serial
number that is also shown in this window. This serial number is printed on a sticker on the bottom of the
PCB. To help identifying the board the LED0 close to the SW0 can be toggled by the GUI.
4.2.2 Operating Mode
The operating mode of the device can be chosen in this section. Available are Standby, Normal and
Sleep modes, as described in the data sheet. Additionally, the state of the INH pin is continuously
monitored and shown in a check box. The switch to Normal and Standby mode can always be executed
by issuing the corresponding write to the DCMR register. To enter Sleep mode, certain conditions must be
fulfilled, which are described in the data sheet. The GUI checks for these conditions and if they are not
fulfilled logs an error in the SPI log window. The mode will remain as before. A write attempt to DCMR will
not happen.
4.2.3 CAN Transceiver
In this section the transceiver part can be configured. For the CAN Transceiver the following modes are
accessible
Graphical User Interface (GUI)
© 2018 Microchip Technology Inc. User Guide DS50002672B-page 14

• Standby mode
• Normal mode
• Normal mode with undervoltage detection active
• Silent mode
Note: To use the transceiver the device operating mode has to be Normal mode. This mode can be
changed as described in 4.2.2 Operating Mode
In this section it is also possible to control an output of the SAMC21 connected to the TXD input.
Available options are
• TXD pulsed - this will pulse the TXD with a 50% duty cycle
• TXD static low
• TXD static high
• TXD tristate - in this case the internal pull-up on the ATA657X will pull the pin high
When the pulse option is selected, the nearest possible value for the frequency will be selected and the
Freq. cell will be updated accordingly.
4.2.4 Watchdog
In this section, the watchdog can be configured. Available modes are:
• “Off”
• “Window mode”
• “Time-Out mode”
Additionally, all the configuration bits for the watchdog can be controlled.
The following bits can be set/cleared:
• “Active in Sleep mode” - sets/clears the WDSLP bit in WDCR1 register
• “Long startup window” - sets/clears the WDLW bit in the WDCR1 register
• “Active Discharge” - sets/clears the ADCH bit in the WDCR1 register
“Watchdog period” and “Reset pulse length” control the settings in WDCR1 and WDCR2.
Note: In order to avoid unwanted configuration of the window watchdog (WWD), the ATA6570 only
allows users to configure the WWD (write access to WDCR1 register and WDCR2) when the device is in
Standby mode. For more information, please see the data sheet.
An appropriate trigger setup should be made that configures the SAMC21 Xplained Pro to generate an
SPI trigger command with the configured frequency. Activating the trigger will first update the frequency
on the SAMC21 Xplained Pro and then activate the continuous triggering.
4.2.5 System Events
This section allows the user to enable/disable the capturing of all events distributed across the different
registers. The current status is indicated next to the button that toggles the status. The following bits can
be configured:
• BOUTE - Bus dominant time-out timer
• BSCE - Bus short circuit event
• SPIFE - SPI failure event
• BSE - CAN bus status detection
• TRXFE - TXD failure status
Graphical User Interface (GUI)
© 2018 Microchip Technology Inc. User Guide DS50002672B-page 15

• CWUE - CAN wake-up event
• OTPWE - Overtemperature event
The displayed status is not a live-view and only updates when the corresponding button is pressed or the
complete tab is updated as described in Section .4.2 Maintab
4.2.6 Wake-up Settings
In this section, all wake-up sources supported by the ATA657X device can be activated. For the Local
wake-up on pin Wake, falling, rising or both edges can be configured as a valid wake-up source. For the
Remote wake-up, either wake-up pattern, wake-up frame or none have to be configured. If “Wake-Up
Frame” is selected, the frame must be configured as described in section The4.2.7 CAN PN Settings
SPI wake-up button will wake up the device by setting the device into Standby mode. The four check
boxes are updated when a full refresh on the tab is performed.Maintab
4.2.7 CAN PN Settings
This section allows the user to configure the CAN-PN functionality available in the ATA657X. The wake-
up frame can be configured with either a STD identifier or an extended one, and, if necessary, a data byte
mask can be activated, as well.
Note: It should be noted that the data bytes are a mask of bits expected to be 1, i.e., a data byte of
0xAA on the bus will generate a wake-up for devices configured for 0x01, 0x0A and 0xAA and others
where all bits selected in the mask are fulfilled.
Note: It should be noted that the configuration for the CAN PN only becomes valid and active after the
PNCFOK flag has been set. This can be done by pressing the "Set PNCFOK" button in this section.
4.2.8 General Purpose Memory
This section gives access to the 4 bytes of general purpose memory available on the ATA657X (available
at addresses 0x6-0x9). The bytes read/written are selected with the check boxes. The displayed values
are not a live-view but only update when the corresponding button is pressed or the complete tab is
updated as described in section .4.2 Maintab
4.2.9 Status bits
This section gives an overview of all status bits of the device. The display is not updated continuously but
must be refreshed manually by clicking the button.Read Status bits
Bits can not be manipulated individually but it is possible to clear all status-bits that are writable at once.
The following bits are cleared when clicking the button:Clear status bits
• “BOUTS” - Bus dominant timeout status
• “BS” - Bus silence
• “BSCS” - Bus short circuit
• “CACC” - Corrupted write access to watchdog configuration registers
• “CWUS” - CAN wake-up status
• “ETRIG” - Early watchdog trigger
• “ILLCONF” - Watchdog configuration was written while the device is not in Standby mode
• “LWUFS” - Local wake-up falling edge detected
• “LWURS” - Local wake-up rising edge detected
• “OF” - Watchdog overflow
• “OFSLP” - Watchdog overflow in Sleep mode
Graphical User Interface (GUI)
© 2018 Microchip Technology Inc. User Guide DS50002672B-page 16

• “OTPW” - Over-temperature pre-warning
• “PNEFD” - Partial networking frame detection status
• “PWRONS” - Power-on Rteset
• “SPIFS” - SPI failure status
• “TRXF” - Transceiver failure
A list of all status-bits and their descriptions can be found in the data sheet https://www.microchip.com/
wwwproducts/en/ATA6570.
4.2.10 Lock Control
In this section, it is possible to control the bits locking specific parts of the device memories. All seven
lock bits can be configured. The configuration is only written/read when pressing the write/read button.
Ticking the check boxes will not update the value on the ATA657X. The displayed status is not a live-view
but only updates when the corresponding button is pressed or the complete tab is updated as described
in section .4.2 Maintab
4.2.11 SPI Log Window
In this section, all SPI communication with the ATA657X will be logged and possible errors are displayed.
The log can be cleared by pressing the log button below it. The log entry will be made as soonClear SPI
as an action in the GUI is performed. If the command was accepted by the ATA657X, it is not actually
checked. As more data is written in the log file, the GUI navigation speed might be affected. In such
cases, try clearing the log.
4.3 Registers
This tab allows the user to manipulate the registers directly. Each column shows the name of the register,
the address, the last read value and gives the option to read from the register or write to it.
Figure 4-2. Registers
name
address value
It is also possible to read all registers at once. When writing registers, it is possible to automatically verify
the value afterward. This is selectable with the check box "Verify after write". Until a value is verified, it will
be shown in a red font.
Note: The displayed values are not a live-view but only updates when the corresponding button is
pressed or the complete tab is updated by a tab-switch.
4.4 SPI
This tab allows to send SPI commands to the ATA657X device directly. This can be useful for writing
multiple registers at the same time or for debugging purposes. To read an address, a valid hex value
must be entered in the Address (hex) field.
Graphical User Interface (GUI)
© 2018 Microchip Technology Inc. User Guide DS50002672B-page 17

Figure 4-3. SPI
Note: The data is sent out starting from the lowest significant byte. The order in which the bytes are sent
is from right to left. Writing address 0x06 and data 0xAA55 will write 0x55 to 0x06 and 0xAA to 0x07.
4.5 CAN
This tab allows some very limited sending of CAN messages for testing. Only "singleshot" messages are
supported.
Figure 4-4. CAN
Extended ID
Identifier hex (mandatory)
DLC decimal (mandatory)
Data Speed
To initiate a transmission the identifier, the DLC and at least the number of bytes specified in the DLC
must be given. After clicking send frame, the frame will be sent one time if the configuration is valid. It is
not possible to receive CAN data.
Graphical User Interface (GUI)
© 2018 Microchip Technology Inc. User Guide DS50002672B-page 18
Produkt Specifikationer
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Kategori: | Ikke kategoriseret |
Model: | ATA6570 |
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