Microchip CEC1702 Manual

Microchip Ikke kategoriseret CEC1702

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 2017-2021 Microchip Technology Inc. DS00002402D-page 1

INTRODUCTION

This application note provides information on design considerations for a printed circuit board (PCB) for the Microchip

CEC1702 device.

The design of the PCB requires care to provide good supply and ground paths; in addition, other design issues are

addressed in this document.

The functional blocks in the CEC1702 have different requirements for routing and external connections, which are also

outlined in this application note.

Please see References for device-level information such as V

CC1 power planes, and mechanical package information

for the 84-Pin WFBGA.

This document includes the following topics:

•Section 1.0, "General Layout Considerations," on page 2

•Section 2.0, "Miscellaneous Considerations," on page 9

•Section 3.0, "JTAG Design and Layout Guide," on page 19

Audience

This document is written for a reader that is familiar with hardware design. The goal of this application note is to provide

information about sensitive areas of the CEC1702 PCB layout.

References

The following documents should be referenced when using this application note. Please contact your Microchip repre-

sentative for availability.

• Microchip CEC1702 Data Sheet

• Microchip CEC1702 EVB Reference Schematic

• I2C-bus specification and user manual, Rev. 6 - 4 April, 2014 or later (see www.nxp.com/documents/user_manual/

UM10204.pdf)

Package Information

The CEC1702 device is currently available in the following package:

• CEC1702 for 84-pin, WFBGA

AN2402

PCB Layout Guide for CEC1702

Author: Tom Tse



Microchip Technology Inc.

AN2402

DS00002402D-page 2  2017-2021 Microchip Technology Inc.

1.0 GENERAL LAYOUT CONSIDERATIONS

This section describes layout considerations for the CEC1702 device. This includes the following topics:

•Section 1.1, "Decoupling Capacitors," on page 2

•Section 1.2, "32.768kHz Crystal Oscillator," on page 4

•Section 1.3, "CAP Pins, AVSS/GND Connection," on page 5

•Section 1.4, "PCB Mounted Analog Power Supply Filter for PLL Usage," on page 5

•Section 1.5, "BGA Package PCB Layout Considerations," on page 6

1.1 Decoupling Capacitors

This section includes the following topics:

•Section 1.1.1, "CEC1702 WFBGA Capacitors," on page 2

Decoupling capacitors should be placed as close to the chip as possible to keep series inductance low. When the capac-

itors are mounted on the bottom side of the PCB, the capacitors are connected to the ground plane from the bottom

layer directly using the shortest path to the device. Each VCC pin should have a 0.1 F capacitor located as close to

the pin as possible. Bypass capacitors should be placed close to the supply pins of the CEC1702 with short and wide

traces.

The CEC1702 has an integrated voltage regulator to supply the core circuitry. Decoupling this regulator requires a crit-

ical capacitor of 1F on the CAP pin. ESR of this 1F capacitor, including the routing resistance, must be less than 100

mOhm.

Capacitors may carry large currents that generate magnetic fields, inducing noise on nearby traces. Sensitive traces

such as the 32kHz crystal should be separated by at least five times the trace width from decoupling capacitors when

possible.

Connecting decoupling caps to power and ground planes using two vias per pad will reduce series inductance.

•FIGURE 1-1: on page 3 shows decoupling for the CEC1702 84-pin WFBGA.

The VCC pin decoupling capacitors can use any typical 16V 10% Ceramic. See also the CEC1702 EVB Schematics

and Bill of Materials.

1.1.1 CEC1702 WFBGA CAPACITORS

•Figure 1-1 shows decoupling for the CEC1702 84-pin WFBGA package.

Note: The capacitors can use any typical 16V 10% ceramic.

Produkt Specifikationer

Mærke:	Microchip
Kategori:	Ikke kategoriseret
Model:	CEC1702

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