Microchip KSZ9893 Manual

Microchip Ikke kategoriseret KSZ9893

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 2018 Microchip Technology Inc. DS00002756A-page 1

1.0 INTRODUCTION

This document provides a hardware design checklist for KSZ9893RNX. These checklist items should be followed when

utilizing the KSZ9893RNX in a new board design.

A summary of the hardware design checklist items is provided in Section 12.0, "Hardware Checklist Summary," on

page 30 . Detailed information on each checklist item can be found in the following corresponding sections:

• Package and Pin Considerations on page 2

• Reference Clock Circuits and Connections on page 3

• Power/Ground Connections on page 4

• ISET Resistor on page 5

• Ethernet PHY Ports on page 5

• Management Bus Selection on page 12

• MAC Port 3 – Digital Data Bus Interfaces on page 15

• LED Indicator Pins on page 27

• Miscellaneous on page 29

A listing of available KSZ9893RNX hardware design collaterals can be found in Section 11.0, "Reference Materials," on

page 29 .

KSZ9893RNX

Hardware Design Checklist

KSZ9893RNX

DS00002756A-page 2  2018 Microchip Technology Inc.

2.0 PACKAGE AND PIN CONSIDERATIONS

2.1 Package Orientation and Pin Numbering

Check to ensure the package orientation and pin numbering with respect to top view of package are in the counterclock-

wise direction. Refer to the KSZ9893RNX Data Sheet for additional information.

2.2 Pin Type

Check the pin-outs of the KSZ9893RNX device to ensure all pin types and directions match the KSZ9893RNX Data

Sheet and the interfacing devices are confi or bidirectional pin types for schegured with corresponding input, output, -

matic design rule error checking.

It is important to always check the pin types in the data sheet of the connecting pins between two devices to ensure the

adjoining pins are not both inputs and not both outputs. Do not rely on just the pin name of the bus interface between

two connecting devices. The same pin name may be defined as an input or an output depending on the interface per-

spective. This is especially for the RGMII, RMII, and MII pins, as defined from the PHY perspective or MAC perspective.

2.3 Configuration Strap Pins

The KSZ9893RNX utilizes configuration strap pins to configure the device for different modes. These strap pins are con-

figured by using internal and external pull-up/pull-down resistors to create a High or Low state on the pins which are

sampled at the end of a device power-up or software reset cycle. They are also latched when powering-up from a hard-

ware or software power-down or Hardware Reset state (rising edge of RESET_N).

In some systems, for example, the connecting MAC input pins may drive high during power-up or reset and conse-

quently cause the multiplexed strap-in pins on the RGMII/RMII/MII signals to be latched high instead of low. In this case,

it is recommended to add 1K pull-downs to these strap-in pins to ensure they latch low.

Check to ensure proper external pull-ups or pull-downs, as needed, are installed for all the strap pins as defined in the

KSZ9893RNX Data Sheet.

Produkt Specifikationer

Mærke:	Microchip
Kategori:	Ikke kategoriseret
Model:	KSZ9893

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