Microchip PIC24HJ12GP202 Manual

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Side 1/62

Interrupts

Section 6. Interrupts

HIGHLIGHTS

This section of the manual contains the following topics:

6.1 Introduction .................................................................................................................... 6-2

6.2 Non-Maskable Traps...................................................................................................... 6-7

6.3 Interrupt Processing Timing ......................................................................................... 6-12

6.4 Interrupt Control and Status Registers......................................................................... 6-15

6.5 Interrupt Setup Procedures.......................................................................................... 6-55

6.6 Design Tips .................................................................................................................. 6-60

6.7 Related Application Notes............................................................................................ 6-61

6.8 Revision History ...........................................................................................................6-62

PIC24H Family Reference Manual

6.1 INTRODUCTION

The PIC24H Interrupt Controller module reduces the numerous peripheral interrupt request

signals to a single interrupt request signal to the PIC24H CPU. It has these features:

• Up to eight processor exceptions and software traps

• Seven user selectable priority levels

• Interrupt Vector Table (IVT) with up to 126 vectors

• A unique vector for each interrupt or exception source

• Fixed priority within a specified user priority level

• Alternate Interrupt Vector Table (AIVT) for debugging support

• Fixed interrupt entry and return latencies

6.1.1 Interrupt Vector Table

Figure 6-1 shows the IVT resides in program memory starting at location 0x000004. The IVT

contains 126 vectors consisting of eight non-maskable trap vectors and up to 118 sources of

interrupt. In general, each interrupt source has its own vector. Each interrupt vector contains a

24-bit-wide address. The value programmed into each interrupt vector location is the starting

address of the associated Interrupt Service Routine (ISR).

6.1.2 Alternate Vector Table

Figure 6-1 shows the AIVT that is located after the IVT. Access to the AIVT is provided by the

Enable Alternate Interrupt Vector Table (ALTIVT) control bit in Interrupt Control Register 2

(INTCON2<15>). If the ALTIVT bit is set, all interrupt and exception processes use the alternate

vectors instead of the default vectors. The alternate vectors are organized in the same manner

as the default vectors.

The AIVT supports emulation and debugging by providing a means to switch between

an application and a support environment without requiring the interrupt vectors to be

reprogrammed. This feature also enables switching between applications for evaluation of

different software algorithms at run time. If the AIVT is not needed, the AIVT should be

programmed with the same addresses used in the IVT.

6.1.3 Reset Sequence

A device Reset is not a true exception because the interrupt controller is not involved in the Reset

process. The PIC24H device clears its registers in response to a Reset, which forces the

Program Counter (PC) to zero. The processor then begins program execution at location

0x000000. The user programs a GOTO instruction at the Reset address, that redirects program

execution to the appropriate start-up routine.

Note: Any unimplemented or unused vector locations in the IVT and AIVT should be

programmed with the address of a default interrupt handler routine that contains a

RESET instruction.

Produkt Specifikationer

Mærke:	Microchip
Kategori:	Ikke kategoriseret
Model:	PIC24HJ12GP202

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