Microchip PIC32MX130F256D Manual

Microchip Ikke kategoriseret PIC32MX130F256D

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Side 1/64

CPU for Devices

with M4K® Core

Section 2. CPU for Devices with M4K® Core

HIGHLIGHTS

This section of the manual contains the following topics:

2.1 Introduction................................................................................................................2-2

2.2 Architecture Overview ............................................................................................... 2-3

2.3 PIC32 CPU Details .................................................................................................... 2-6

2.4 Special Considerations When Writing to CP0 Registers ......................................... 2-11

2.5 Architecture Release 2 Details ................................................................................ 2-12

2.6 Split CPU bus .......................................................................................................... 2-12

2.7 Internal System Busses........................................................................................... 2-13

2.8 Set/Clear/Invert........................................................................................................2-13

2.9 ALU Status Bits........................................................................................................ 2-14

2.10 Interrupt and Exception Mechanism ........................................................................2-14

2.11 Programming Model ................................................................................................ 2-14

2.12 Coprocessor 0 (CP0) Registers............................................................................... 2-21

2.13 MIPS16e® Execution ............................................................................................... 2-55

2.14 Memory Model......................................................................................................... 2-55

2.15 CPU Instructions, Grouped By Function.................................................................. 2-56

2.16 CPU Initialization ..................................................................................................... 2-59

2.17 Effects of a Reset ....................................................................................................2-60

2.18 Related Application Notes ....................................................................................... 2-61

2.19 Revision History....................................................................................................... 2-62

PIC32 Family Reference Manual

2.1 INTRODUCTION

The PIC32 MCU is a complex system-on-chip (SoC) that is based on the M4K

® Microprocessor

core from MIPS® Technologies. The M4K® is a state-of-the-art, 32-bit, low-power, RISC proces-

sor core with the enhanced MIPS32® Release 2 Instruction Set Architecture (ISA).

This chapter provides an overview of the CPU features and system architecture of the PIC32

family of microcontrollers that are based on the M4K

® processor core.

2.1.1 Key Features

• Up to 1.5 DMIPS/MHz of performance

• Programmable prefetch cache memory to enhance execution from Flash memory (not

available on all devices; refer to the specific device data sheet to determine availability)

• 16-bit Instruction mode (MIPS16e

®) for compact code

• Vectored interrupt controller with up to 96 interrupt sources

• Programmable User and Kernel modes of operation

• Atomic bit manipulations on peripheral registers (Single cycle)

• Multiply-Divide unit with a maximum issue rate of one 32 x 16 multiply per clock

• High-speed Microchip ICD port with hardware-based non-intrusive data monitoring and

application data streaming functions

• EJTAG debug port allows extensive third party debug, programming and test tools support

• Instruction controlled power management modes

• Five-stage pipelined instruction execution

• Internal code protection to help protect intellectual property

2.1.2 Related MIPS® Documentation

• MIPS32® M4K® Processor Core Software User’s Manual – MD00249-2B-M4K-SUM

• MIPS® Instruction Set – MD00086-2B-MIPS32BIS-AFP

• MIPS16e® – MD00076-2B-MIPS1632-AFP

• MIPS32® Privileged Resource Architecture – MD00090-2B-MIPS32PRA-AFP

Note: This family reference manual section is meant to serve as a complement to device

data sheets. Depending on the device variant, this manual section may not apply to

all PIC32 devices.

Please consult the note at the beginning of the “CPU” chapter in the current device

data sheet to check whether this document supports the device you are using.

Device data sheets and family reference manual sections are available for

download from the Microchip Worldwide Web site at: http://www.microchip.com

Produkt Specifikationer

Mærke:	Microchip
Kategori:	Ikke kategoriseret
Model:	PIC32MX130F256D

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