Microchip HV7355DB1 Manual

Microchip Ikke kategoriseret HV7355DB1

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Supertex inc.

www.supertex.com

HV7355DB1

Doc.# DSDB-HV7355DB1

B070314

General Description

The HV7355 is a monolithic eight-channel, high-speed,

high voltage, unipolar ultrasound transmitter pulser.

This integrated, high performance circuit is in a single,

8x8x0.9mm, 56-lead QFN package.

The HV7355 can deliver guaranteed ±1.5A source and sink

current to a capacitive transducer with 0 to +150V peak

voltage. It is designed for medical ultrasound imaging and

ultrasound material NDT applications. It can also be used

as a high voltage driver for other piezoelectric or capacitive

MEMS transducers, or for ATE systems and pulse signal

generators as a signal source.

The HV7355’s circuitry consists of controller logic circuits,

level translators, gate driving buffers and a high current and

high voltage MOSFET output stage. The output stages of

each channel are designed to provide peak output currents

typically over ±1.5A for pulsing, with up to 150V swings. The

upper limit frequency of the pulser waveform is dependent

upon the load capacitance. With different capacitance load

conditions the maximum output frequency is about 20MHz.

This demoboard datasheet describes how to use the

HV7355DB1 to generate the basic high voltage pulse

waveform as an ultrasound transmitting pulser.

The HV7355 circuit uses DC-coupling from a 3.3V logic input

to output TX0~7 internally, therefore the chip needs three

sets of voltage supply rails: VLL (+3.3V), VDD/VSS (+/-5.0V)

and VPP (up to +150V). The VPP high voltage supply can be

changed rather quickly, compared to the capacitor gate-

coupled driving pulsers. This direct coupling topology of the

gate drivers not only saves two high voltage capacitors per

channel, but also makes the PCB layout easier.

The control signal logic-high voltage should be the same

as the VLL voltage of the IC, and the logic-low should be

referenced to GND.

The HV7355DB1 output waveforms can be displayed using

an oscilloscope by connecting the scope probe to the test

points TX0~7 and GND. The soldering jumper can select

whether or not to connect the on-board dummy load, a

330pF capacitor paralleling with a 2.5kΩ resistor. The test

points can be used to connect the user’s transducer to easily

evaluate the pulser.

Block Diagram

150V, 1.5A, Unipolar

Ultrasound Pulser Demoboard

IN0

IN7

VLL

GND

VSS

+5.0 to 150V+3.3V

CPF VPPVDD

VPF

CWD

Q[7:0]

-5.0V

SDI

SDO

SCK

SET

EN PWR

RGND

SUB

AVDD

VSUB

TX0

2.5k

330pF

GND

Dummy

Load

Waveform

Generator

CPLD

+3.3V

OSC

JTAG

EXCLK

CLKIN

WAVE

FREQ

SEL

CW/RTZ

RTZ

PWR

40MHz

TX7

VDD

VDD VPP

VDD

VPF

VPP

TX7

VPP

+5.0V

HV7355DB1

Supertex inc.

www.supertex.com

Doc.# DSDB-HV7355DB1

B070314

The PCB Layout Techniques

The large thermal pad at the bottom of the HV7355 package

is internally connected to the IC’s substrate (VSUB). This

thermal pad should be connected to 0V or GND externally

on the PCB. The designer needs to pay attention to the con-

necting traces on the outputs TX0~7, as the high-voltage

and high-speed traces. In particular, controlled-impedance

to the ground plane and more trace spacing needs to be ap-

plied in this situation.

High-speed PCB trace design practices that are compatible

with about 50 to 100MHz operating speeds are used for the

demo board PCB layout. The internal circuitry of the HV7355

can operate at quite a high frequency, with the primary speed

limitation being load capacitance. Because of this high

speed and the high transient currents that result when driv-

ing capacitive loads, the supply voltage bypass capacitors

and the driver to the FET’s gate-coupling capacitors should

be as close to the pins as possible. The GND pin should

have low inductance feed-through via connections that are

connected directly to a solid ground plane. The VDD, VSS,

VPP and CPP voltage-supply and/or bypass capacitor pins

can draw fast transient currents of up to 2.0A, so they should

be provided with a low-impedance bypass capacitor at the

chip's pins. A ceramic capacitor of 1.0 to 2.0µF may be used.

Only VPP to GND capacitors need be high voltage. CPF to

VPP capacitors only need be low voltage. Minimize the trace

length to the ground plane, and insert a ferrite bead in the

power supply lead to the capacitor to prevent resonance in

the power supply lines. For applications that are sensitive

to jitter and noise when using multiple HV7355 ICs, insert

another ferrite bead between each chips supply line.

Pay particular attention to minimizing trace lengths and

using sufcient trace width to reduce inductance. Surface

mount components are highly recommended. Since the out-

put impedance of the HV7355’s high voltage power stages

is very low, to obtain better waveform integrity at the load

terminals after long cables, in some cases it may be desir-

able to add a small value resistor in series with the outputs

TX0~7. This will, of course, reduce the output voltage slew

rate at the terminals of a capacitive load. Be aware of the

parasitic coupling from the outputs to the input signal termi-

nals of the HV7355.

This feedback may cause oscillations or spurious waveform

shapes on the edges of signal transitions. Since the input

operates with signals down to 3.3V, even small coupling

voltages may cause problems. Use of a solid ground plane

and good power and signal layout practices will prevent this

problem. Also ensure that the circulating ground return cur-

rent from a capacitive load cannot react with common induc-

tance to create noise voltages in the input logic circuitry.

Testing the Integrated Pulser

The HV7355 pulser demoboard should be powered up with

a DC power supplie that has current limiting functions.

To meet the typical loading conditions, the on-board dummy

load 330pF//2.5kΩ should be connected to the high voltage

pulser output through the solder jumper when using an oscil-

loscope’s high impedance probe. To evaluate different load-

ing conditions, the values of the RC within the current and

power limit of the device may be changed.

In order to drive the user’s piezo transducers with a cable,

one should match the output load impendence properly to

avoid cable and transducer reections. A 70 to 75Ω coaxial

cable is recommended. The coaxial cable end should be sol-

dered to TX0~7 and GND directly with very short leads. If a

user’s load is being used, the on-board dummy load should

be disconnected by cutting the small shorting copper trace in

between the zeroΩ resistor’s (R2, R12 etc.) pads. They are

shorted by factory default.

All of the on-board test points are designed to work with the

high impedance probe of the oscilloscope. Some probes

may have limited input voltage. When using the probe on

these high voltage test-points, make sure that VPP voltages

do not exceed the probe limit. Using the high impendence

oscilloscope probe for the on-board test points, it is impor-

tant to have short ground leads to the circuit board ground

plane.

Produkt Specifikationer

Mærke:	Microchip
Kategori:	Ikke kategoriseret
Model:	HV7355DB1

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