Microchip LE9642 Manual

Microchip Ikke kategoriseret LE9642

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1
© 2014 Microsemi Corporation. All Rights Reserved.
Features
• Economical, fifth-generation line interface
solution for VoIP processors and SoCs
• Smaller, 48-pin 7x7 mm QFN package
• Dual Channel Architecture
• Single port 4-wire interface control (ZSI)
- Compatible with numerous VoIP processors and
SoC solutions
- Less expensive isolation than multi-port control
- Simplifies board routing
• VoicePath SDK and VP-API-II Software
available to implement FXS functions
• VeriVoice Professional Test Suite Software
• Comprehensive subscriber loop testing,
including Telcordia GR-909-CORE / TIA-1063
diagnostic testing
• Industry leading advanced test software
• VeriVoice Manufacturing Test Package (VVMT)
• Facilitates factory testing and calibration of
assembled boards
• Low cost, Energy Efficient Shared Switching
Regulator Architecture
- Dual Output power supply
- Integrated battery switches
- Up to 70 VRMS open circuit ringing with
5 REN load
• Low cost, 2-Layer PCB Reference Designs
• Complete Wideband BORSCHT functionality
• Worldwide Programmability
• Per channel Narrowband or Wideband
operation
Applications
• Fixed Wireless (LTE) Gateways
• DSL Residential Gateways and Integrated
Access Devices (IADs)
• Cable Embedded Multimedia Terminal
Adapters (eMTAs)
• PON Single Family Units (SFU)
• Fiber-to-the-premise (FTTX) solutions
Description
The miSLIC
TM
Line Circuits together with a VoIP
processor or SoC, provides an economical turn-key
solution for derived voice applications. The miSLIC
devices are controlled by a VoIP processor or SoC
through a simple, single serial interface.
The dual channel Le9642 miSLIC device uses an energy
efficient shared power supply topology for reduced BOM
cost. The Le9642 can be configured for patent-pending
shared Buck-Boost Automatic Battery Switching (BBABS)
operation. Ringing and system power management are
supported to limit the peak power requirements of each
telephone line FXS port. The dual channel Le9642
features wideband clarity and complete BORSCHT
functionality.
Manufacturing self test and subscriber line diagnostics
are available features. All AC, DC, and power parameters
are programmable making the Le9642 device suitable for
any short loop application requiring SLIC functionality.
Figure 1 - Le9642 Block Diagram
TIPD
1
TDC
1
TAC
1
RINGD
1
RDC
1
RAC
1
GND VREF
VBL
1
High Voltage
Line Driver
Data
Transmission
and Control
Analog
Reference
Voice Signal
Processing
Supervision
Processing
Signaling
Control
LFC
1
RTV
1
RSN
1
IHL
1
Switching
Regulator
Controllers
TIPD
2
TDC
2
TAC
2
RINGD
2
RDC
2
RAC
2
VBL
2
High Voltage
Line Driver
Signal
Generation
Voice Signal
Processing
Supervision
Processing
Signaling
Control
LFC
2
RTV
2
RSN
2
IHL
2
SWOUTZ
ZCLK
ZMOSI
ZMISO
ZSYNC
SWCMPY
SWVSY
SWISY
SWOUTY
SWCMPZ
SWVSZ
SWISZ
Power
Supplies
AVDD
VDDSW
VDDHPI
DVDD
DVDD1V2IREF
Le9642
VBH
VBH
Document ID# 150403 Version 1 September 2014
Le9642
Dual Subscriber Line Interface Circuit
miSLIC
TM
Series
Product Brief
Ordering Information
Device OPN
Device Type Package Packing
Le9642PQCT SLIC, BBABS 48-pin QFN Tape & Reel
Le9642PQC SLIC, BBABS 48-pin QFN Tray
This Green package meets RoHS 2 Directive 2011/65/EU of the
European Council to minimize the environmental impact of
electrical equipment.
Le9642
Product Brief
2
© 2014 Microsemi Corporation. All Rights Reserved.
Selected Electrical Specifications
Device Pinout Package Drawings
Related Collateral
www.microsemi.com/voice-line-circuits
• Le9641 Tracking Battery miSLIC
TM
Line Circuit Preliminary Data Sheet, Document ID# 148556
• ZLR964122L SM2 Line Module, ZSI, 1 FXS, Buck-Boost ABS, 85-V
PK
, 5 REN
• ZLR964124L SM2 Line Module, PCM/SPI, 1 FXS Buck-Boost and 1 FXS Inverting-Boost, 85-V
PK
, 5 REN
• Le9642 Shared Battery Dual miSLIC
TM
Line Circuit Preliminary Data Sheet, Document ID# 148557
• ZLR964222L SM2 Line Module, ZSI, 2 FXS, Buck-Boost ABS, 85-V
PK
, 5 REN
Description Symbol Test Conditions Min Typ Max Unit
Ambient Temperature, under Bias T
A
-40 +85 °C
Digital and Analog Supply Voltages DVDD, AVDD 3.135 3.3 3.465 V
DC
Operating Limits: VBH
VBL
VBH = -(V
SWITCHER
+ (2 * |VBL|) − 2V)
VBL = -40 V
DC
to -25 V
DC
V
DC
Line Current: ILA 18 25 30 mA
Ringing Voltage V
RING
5 REN 50 60 V
RMS
Two-Wire Return Loss R
L
200 to 3400 Hz 30 dB
Longitudinal Balance 1 kHz 58 dB
Device Power Dissipation, Continuous P
D(max)
T
A
= 85°C 1.5 W
Junction to Ambient Thermal Resistance θ
JA
29 °C/W
Device Power Consumption (BBABS) Symbol Test Conditions Power Typ Unit
Shutdown
P
D
Switcher off
Per Channel
5
mW
Disconnect 25
Low Power Idle Mode (LPIM) On-Hook 47
Idle On-Hook 99
Active Off-Hook, 300 Ω, ILA = 25 mA 520
Ringing 50 V
RMS
,
5 REN, other channel in LPIM mode Both Channels 840
Exposed Ground Pad
1
RSN1
RTV1
IHL1
TAC1
RAC1
TDC1
RDC1
LFC1
IREFVREF
SWVSY
SWIS Y
SWCMPY
SWOUTY
AVDD AVDD
SWISZ
IHL2
TAC2
RAC2
TDC2
RDC2
RTV2
RSN2
SWOUTZ
LFC2
SWVSZ
SWCMPZ
VBL1
TIPD1
RINGD1
VBL2
TIPD2
RINGD2
VBH
VDDSW
DVDD
ZSYNC
ZMISO
ZMOSI
ZCLK
VDDHPI
DVDD1V2
RSVD
RS VD
RS VD
RSVD
RSVD
2
3
4
5
6
7
8
9
10
11
12
36
35
34
33
32
31
30
29
28
27
26
25
13 14 15 16 17 18 19 20 21 22 23 24
48 47 46 45 44 43 42 41 40 39 38 37

Produkt Specifikationer

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Kategori: Ikke kategoriseret
Model: LE9642

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