Microchip MCP33121D-10 Manual
Microchip
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MCP33121D-10
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2018 Microchip Technology Inc. DS20005947B-page 1
MCP33131D/21D/11D-XX
Features
• Sample Rate (Throughput):
- MCP33131D/21D/11D-10: 1 Msps
- MCP33131D/21D/11D-05: 500 kSPS
• 16/14/12-Bit Resolution with No Missing Codes
• No Latency Output
• Wide Operating Voltage Range:
- Analog Supply Voltage (AVDD): 1.8V
- Digital Input/Output Interface Voltage (DV
IO):
1.7V - 5.5V
- External Reference (VREF): 2.5V - 5.1V
• Differential Input Operation
- Input Full-Scale Range: -VREF to +VREF
• Ultra Low Current Consumption (typical):
- During Input Acquisition (Standby): ~ 0.8 µA
- During Conversion:
MCP33131D/21D/11D-10: ~1.6 mA
MCP33131D/21D/11D-05: ~1.4 mA
• SPI-Compatible Serial Communication:
- SCLK Clock Rate: up to 100 MHz
• ADC Self-Calibration for Offset, Gain, and
Linearity Errors:
- During Power-Up (automatic)
- On-Demand via user’s command during
normal operation
• AEC-Q100 Qualified:
- Temperature Grade 1: -40°C to +125°C
• Package Options: MSOP-10 and TDFN-10
Typical Applications
• High-Precision Data Acquisition
• Medical Instruments
• Test Equipment
• Electric Vehicle Battery Management Systems
• Motor Control Applications
• Switch-Mode Power Supply Applications
• Battery-Powered Equipment
System Design Supports
The MCP331x1D-XX Evaluation Kit demonstrates the
performance of the MCP331x1D-XX SAR ADC family
devices. The evaluation kit includes: (a) MCP331x1D
Evaluation Board, (b) PIC32MZ EF Curiosity Board for
data collection, and (c) SAR ADC Utility PC GUI.
Contact Microchip Technology Inc. for the evaluation
tools and the PIC32 MCU firmware example codes.
Package Types
10
MSOP-10
AIN+
AVDD
AIN-
SDI
SCLK
1
2
3
4
9
8
7SDO
DVIO
VREF
TDFN-10
AIN+
AVDD
AIN-
SDI
SCLK
1
2
3
4
10
9
8
7SDO
DVIO
VREF
5 6GND CNVST
56GND CNVST
Top View
Top View
MCP331x1D-XX Device Offering (Note 1):
Part Number Resolution Sample
Rate Input Type Input Range
(Differential)
Performance (Typical)
SNR
(dBFS)
SFDR
(dB)
THD
(dB)
INL
(LSB)
DNL
(LSB)
MCP33131D-10 16-bit 1 Msps Differential ±5.1V 91.3 103.5 -99.3 ±2 ±0.8
MCP33121D-10 14-bit 1 Msps Differential ±5.1V 85.1 103.5 -99.2 ±0.5 ±0.25
MCP33111D-10 12-bit 1 Msps Differential ±5.1V 73.9 99.3 -96.7 ±0.12 ±0.06
MCP33131D-05 16-bit 500 kSPS Differential ±5.1V 91.3 103.5 -99.3 ±2 ±0.8
MCP33121D-05 14-bit 500 kSPS Differential ±5.1V 85.1 103.5 -99.2 ±0.5 ±0.25
MCP33111D-05 12-bit 500 kSPS Differential ±5.1V 73.9 99.3 -96.7 ±0.12 ±0.06
Note 1: SNR, SFDR, and THD are measured with f
IN = 10 kHz, VIN = -1 dBFS, VREF = 5.1V.
1 Msps/500 kSPS 16/14/12-Bit Differential Input SAR ADC
MCP33131D/MCP33121D/MCP33111D-XX
DS20005947B-page 2 2018 Microchip Technology Inc.
Application Diagram
Description
The MCP33131D/MCP33121D/MCP33111D-10 and
MCP33131D/MCP33121D/MCP33111D-05 are
fully-differential 16, 14, and 12-bit, single-channel
1 Msps and 500 kSPS ADC family devices,
respectively, featuring low power consumption and
high performance, using a successive approximation
register (SAR) architecture.
The device operates with a 2.5V to 5.1V external
reference (VREF), which supports a wide range of input
full-scale range from -VREF to +VREF
. The reference
voltage setting is independent of the analog supply
voltage (AVDD) and is higher than AVDD. The
conversion output is available through an easy-to-use
simple SPI- compatible 3-wire interface.
The device requires a 1.8V analog supply voltage
(AVDD) and a 1.7V to 5.5V digital I/O interface supply
voltage (DVIO
). The wide digital I/O interface supply
(DVIO) range (1.7V – 5.5V) allows the device to
interface with most host devices (Master) available in
the current industry such as the PIC32
microcontrollers, without using external voltage level
shifters.
When the device is first powered-up, it performs a
self-calibration to minimize offset, gain and linearity
errors. The device performance stays stable across the
specified temperature range. However, when extreme
changes in the operating environment, such as in the
reference voltage, are made with respect to the initial
conditions (e.g. the reference voltage was not fully
settled during the initial power-up sequence), the user
may send a recalibrate command anytime to initiate
another self-calibration to restore optimum
performance.
When the initial power-up sequence is completed, the
device enters a low-current input acquisition mode,
where sampling capacitors are connected to the input
pins. This mode is called Standby.
During Standby, most of the internal analog circuitry is
shutdown in order to reduce current consumption.
Typically, the device consumes less than 1 µA during
Standby. A new conversion is started on the rising edge
of CNVST. When the conversion is complete and the
host lowers CNVST, the output data is presented on
SDO, and the device enters Standby to begin acquiring
the next input sample. The user can clock out the ADC
output data using the SPI-compatible serial clock
during Standby.
The ADC system clock is generated by the internal
on-chip clock, therefore the conversion is performed
independent of the SPI serial clock (SCLK).
This device can be used for various high-speed and
high-accuracy analog-to-digital data conversion
applications, where design simplicity, low power, and
no output latency are needed.
The device is AEC-Q100 qualified for automotive appli-
cations and operates over the extended temperature
range of -40°C to +125°C. The available package
options are Pb-free small 3 mm x 3 mm TDFN-10 and
MSOP-10.
1.7 nF
22Ω
0V to VREF
AIN+
AIN-
VREF AVDD DV IO
SDI
SCLK
SDO
CNVST
2.5V to 5.1V 1.8V 1.8V to 5.5V
GND
(PIC32MZ)
Host Device
1.7 nF
22Ω
0V to VREF
MCP331x1D-XX
Produkt Specifikationer
| Mærke: | Microchip |
| Kategori: | Ikke kategoriseret |
| Model: | MCP33121D-10 |
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