© 2007-2012 Microchip Technology Inc. DS61113E-page 2-1
CPU for Devices
with M4K® Core
2
Section 2. CPU for Devices with M4K® Core
HIGHLIGHTS
This section of the manual contains the following topics:
2.1 Introduction................................................................................................................2-2
2.2 Architecture Overview ............................................................................................... 2-3
2.3 PIC32 CPU Details .................................................................................................... 2-6
2.4 Special Considerations When Writing to CP0 Registers ......................................... 2-11
2.5 Architecture Release 2 Details ................................................................................ 2-12
2.6 Split CPU bus .......................................................................................................... 2-12
2.7 Internal System Busses........................................................................................... 2-13
2.8 Set/Clear/Invert........................................................................................................2-13
2.9 ALU Status Bits........................................................................................................ 2-14
2.10 Interrupt and Exception Mechanism ........................................................................2-14
2.11 Programming Model ................................................................................................ 2-14
2.12 Coprocessor 0 (CP0) Registers............................................................................... 2-21
2.13 MIPS16e® Execution ............................................................................................... 2-55
2.14 Memory Model......................................................................................................... 2-55
2.15 CPU Instructions, Grouped By Function.................................................................. 2-56
2.16 CPU Initialization ..................................................................................................... 2-59
2.17 Effects of a Reset ....................................................................................................2-60
2.18 Related Application Notes ....................................................................................... 2-61
2.19 Revision History....................................................................................................... 2-62
