Microchip USB2533 Manual

Microchip Ikke kategoriseret USB2533

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2013 - 2015 Microchip Technology Inc. DS00001801C-page 1
INTRODUCTION
The SMBus slave interface can be used to customize the functionality of the USB253x / USB3x13 / USB46x4 hub.
Through this interface, the SOC is able to control the digital and USB lines for internal testing, configure the Hub to func-
tion with the desired options when enumerating, and load custom firmware to fully unlock the features of the embedded
processor. This functionality entails that some configuration registers are accessible only during the configuration
stages, while others are accessible during runtime. Both sets of registers are detailed in this application note.
This document includes the following topics:
• HUB Operational Mode on page 2
•SOC Configuration Stage on page 3
•SMBus Run Time Accessible Registers on page 52
•OTP Configuration on page 61
References
The following documents should be referenced when using this application note. Contact your Microchip representative
for availability.
USB2532 Data Sheet
USB2533 Data Sheet
USB2534 Data Sheet
USB3613 Data Sheet
USB3813 Data Sheet
USB4604 Data Sheet
USB4624 Data Sheet
Protouch Configuration Tool
USB2530 Software Development Kit
System Management Bus Specification, Version 1.0
AN 26.18
Configuration Options for the
USB253x / USB3x13 / USB46x4
Authors: Arnaldo Cruz, Brigham Steele
Microchip Technology, Inc.
AN 26.18
DS00001801C-page 2 2013 - 2015 Microchip Technology Inc.
1.0 HUB OPERATIONAL MODE
1.1 Hub Configuration Stages
The Controller Hub is configured in three stages. The SOC Configuration Stage is executed through the SMBus inter-
face. The hub also is configured from the internal OTP registers through the Hub Configuration Stage and finally during
the Hub Connect Stage. The diagram below shows how these stages flow:
1.2 SMBus Protocol
The SMBus protocol is a flexible 2-pin serial protocol used for low speed communication between integrated circuits.
The protocol consists of a SMBCLK pin generated by the SMBus Master and a bi-directional SMBDATA pin that can be
driven by a Master or a Slave. The bus requires a pull-up resistor on both SMBCLK and SMBDATA to function. The hub
configure the pins as Open/Drain buffers where the driver will either tristate the pin or drive the pin to ground. The input
threshold for the high level ranges from 1.2V to 3.3V, allowing the Hub to communicate with a large sample of SOCs on
the market. Refer to the System Management Bus Specification for more details on the timing specifications of the bus.
FIGURE 1: HUB OPERATIONAL MODE FLOWCHART
Note: Because the OTP Configuration registers are loaded after the SOC_CFG stage, it is possible for configu-
ration registers modified in the SOC_CFG stage to be overwritten in the HUB_CONFIG stage.
HW INIT
SPI?
SMBus?
Run From
External SPI Flash
Run From
Internal ROM
Config Load
From Internal ROM
Combine ROM/SOC
OTP Configuration
Upstream BC
Detection (Optional)
Hub Connect
Configure
Through SMBus
Attach Cmd?
SW_INIT
HUB_CONFIG
SOC_CFG
Y
Y

Produkt Specifikationer

Mærke: Microchip
Kategori: Ikke kategoriseret
Model: USB2533

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